tag:blogger.com,1999:blog-4768404585297749711.comments2023-07-14T05:32:04.963-04:00A Computer Scientist's QuestGedarehttp://www.blogger.com/profile/05234390964444125364noreply@blogger.comBlogger81125tag:blogger.com,1999:blog-4768404585297749711.post-27104355810193927362020-07-31T17:58:07.466-04:002020-07-31T17:58:07.466-04:00Hi Gedare, I am working on adding a Pci device bas...Hi Gedare, I am working on adding a Pci device based on your example to Pc.py. I am getting an error "AssertionError: SimObject Pc already present". I don't know what's causing the error. Did you get this error and how did you get past it? <br />BTW, I get this error also with Cmos.py, just running it without change and the assertion SimObject Cmos already present also exists.<br />LChttps://www.blogger.com/profile/06282513024175793796noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-22916779879777672712020-04-06T21:42:34.156-04:002020-04-06T21:42:34.156-04:00The instructions are encapsulated in an OO manner,...The instructions are encapsulated in an OO manner, and you could possibly hook into their Execute() or other stage. If the CPU model is OoO or speculative this can be a little challenging.Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-21458653102211879922019-10-01T13:42:40.062-04:002019-10-01T13:42:40.062-04:00Thanks for the post. Do you know how we can captur...Thanks for the post. Do you know how we can capture the instruction in the pipeline. I need to send a packet to caches once the instruction executed. But I am not bale to find the instruction while executed. Majidhttps://www.blogger.com/profile/17840008240868007793noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-52440434354758138572019-09-02T06:16:52.138-04:002019-09-02T06:16:52.138-04:00Hi Gedare,
I want to add a new io device in my gem...Hi Gedare,<br />I want to add a new io device in my gem5 simulator and i follow your article, and i can compile my kernel with gem5 config file but i can't compile a module for it, please take me some more hints , i'm trying so hard but i'm new in linux and these concepts.<br />thanks for your attentionAnonymoushttps://www.blogger.com/profile/15069441851816778344noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-4894236350506520752019-06-11T04:29:28.359-04:002019-06-11T04:29:28.359-04:00I've just tested in gem5 08c79a194d1a3430801c0...I've just tested in gem5 08c79a194d1a3430801c04f37d13216cc9ec1da3 (2019q2) and pseudo-instructions did work in SE, here is my setup: https://github.com/cirosantilli/linux-kernel-module-cheat/tree/038c23729bdea50ed0b6e24cf72d0119645d2b94#m5ops-instructions I would be surprised if they didn't work :-)ciro.santillihttps://www.blogger.com/profile/02642132378416878124noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-90310335306781895512019-02-09T15:32:15.788-05:002019-02-09T15:32:15.788-05:00You'll want to start by examining how current ...You'll want to start by examining how current pseudoinstructions work for Alpha. The decoder end will differ, and so will the assembly frontend for emitting the instruction.Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-56743287742775023362018-11-13T10:41:26.967-05:002018-11-13T10:41:26.967-05:00Hello. Thanks for this blog. It helped me a lot.
...Hello. Thanks for this blog. It helped me a lot. <br /><br />Also I wanted to know how different it is to add a pseudo instruction for an alpha system. Could you provide any inputs please.Akshatha M Khttps://www.blogger.com/profile/06838390902709935462noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-36688173771401413852017-11-22T20:14:22.032-05:002017-11-22T20:14:22.032-05:00Hi, I just wanted to thank you a lot for this demo...Hi, I just wanted to thank you a lot for this demo. I think you just saved my honours project.Anonymoushttps://www.blogger.com/profile/09872216151081704035noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-61252208424272422762017-11-13T00:11:16.453-05:002017-11-13T00:11:16.453-05:00I wish to simulate the addition of some new pipeli...I wish to simulate the addition of some new pipeline stages with specific interconnections to the memory hierarchy and branch prediction unit. Which simulator do you think would be the best to model this and observe the delays with the changes?Nishanthttps://www.blogger.com/profile/12811728994039561641noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-48120888819677284642017-11-02T02:23:05.193-04:002017-11-02T02:23:05.193-04:00Hi Gedare,
I am working on gem5 and I want to know...Hi Gedare,<br />I am working on gem5 and I want to know how to find the address range of an application execution in gem5. secondly if i want to modify the cache architecture of gem5, how can i do that. any help will be appreciated.umair khanhttps://www.blogger.com/profile/02567305163196377757noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-38708685341920194432017-08-02T18:07:00.545-04:002017-08-02T18:07:00.545-04:00Hi. Any knowledge you can share about adding a new...Hi. Any knowledge you can share about adding a new instruction?Anonymoushttps://www.blogger.com/profile/17236097141696575389noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-50106442248936630572017-06-01T10:24:07.890-04:002017-06-01T10:24:07.890-04:00Hi Gedare,
can you guide me for using the UART dev...Hi Gedare,<br />can you guide me for using the UART device in gem5 configuration. in fact, I am looking for device to give me uart for fully communication with gem5 full system simulator.<br />thanksAnonymoushttps://www.blogger.com/profile/11783629262564587769noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-24317651341170741042016-09-29T09:51:29.966-04:002016-09-29T09:51:29.966-04:00Hi, I changed the plans e I don't need anymore...Hi, I changed the plans e I don't need anymore add new instructions to my work.Anonymoushttps://www.blogger.com/profile/05446639166436410078noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-43319365941143452062016-09-29T03:00:35.895-04:002016-09-29T03:00:35.895-04:00liuty10 AT gmail DOT comliuty10 AT gmail DOT comTianyihttps://www.blogger.com/profile/01511448649730867838noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-73394765904309355982016-09-29T02:59:36.553-04:002016-09-29T02:59:36.553-04:00Hi, have you succeeded in adding a new instruction...Hi, have you succeeded in adding a new instruction to the ISA? Tianyihttps://www.blogger.com/profile/01511448649730867838noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-65820931490883984812016-06-26T11:10:47.218-04:002016-06-26T11:10:47.218-04:00got it, thanks.got it, thanks.Anonymoushttps://www.blogger.com/profile/05446639166436410078noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-20216641043182522412016-06-24T21:03:48.493-04:002016-06-24T21:03:48.493-04:00Psuedo instructions only work in full system as I ...Psuedo instructions only work in full system as I remember. On SE, you can maybe achieve a similar effect with a custom syscall...Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-20936062495758867522016-04-13T21:10:53.945-04:002016-04-13T21:10:53.945-04:00is it possible add pseudo instruction and ran a SE...is it possible add pseudo instruction and ran a SE system?<br /><br />do you have the source codes? I want simulate your approach.Anonymoushttps://www.blogger.com/profile/05446639166436410078noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-17700686505301586282016-02-03T07:50:13.627-05:002016-02-03T07:50:13.627-05:00You have to put the device in a proper IO address ...You have to put the device in a proper IO address for the ARM target. I don't off-hand know what that might be. On ARM, you might try to hook off the PCI-e..Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-24846572739441962562015-12-18T13:14:59.040-05:002015-12-18T13:14:59.040-05:00Hello Gedare, this tutorial is very helpful!! I ma...Hello Gedare, this tutorial is very helpful!! I manage to attach MyDevice and it works properly using X86. However, I want to attach the same device using ARM architecture in GEM5. I attach the MyDevice to /arm/Realview.py with similar way with Pl050 keyboard but the problem is that i get the following error: Unable to handle kernel paging request at virtual address c400e000. May you help me please??<br /><br />Thank you in advance!Μαρίαhttps://www.blogger.com/profile/14737413687262921458noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-2956857308879635052015-06-05T20:16:41.185-04:002015-06-05T20:16:41.185-04:00If this does what I think it does I thank you. Jus...If this does what I think it does I thank you. Just downloaded it, will give it a shot tomorrow.Jeremy Whitinghttps://www.blogger.com/profile/00406833894255909243noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-74778066251862029392015-04-06T16:33:14.322-04:002015-04-06T16:33:14.322-04:00hi Tuom, I have not posted code, and have lost the...hi Tuom, I have not posted code, and have lost the original source, but a colleague of mine has done some similar benchmarking, you may be interested to see it at https://github.com/sebhub/rb-bench <br /><br />I believe my original code used the array-based approach for both. I tried to keep the implementations similar as possible.Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-80161505361926929592015-01-19T20:02:34.207-05:002015-01-19T20:02:34.207-05:00Hi!
Very interesting... Did you use explicit left ...Hi!<br />Very interesting... Did you use explicit left and right pointers to the children, or just one "chidren" array with two items? I mean, Julienne Walker uses this trick of using "dir = root->data < data" and "root->link[dir] = ...", instead of "if ( data < root->data )", "root->left ..." and "root->right ...". Because if you used one approach for bottom-up and the other one for top-bottom that could cause some difference because of branch prediction. By change, have you published somewhere the bottom-up approach of yours?Tuomhttps://www.blogger.com/profile/04670712591017506606noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-18613173019507886692014-11-16T23:50:33.394-05:002014-11-16T23:50:33.394-05:00This comment has been removed by the author.Anonymoushttps://www.blogger.com/profile/07948200284069912573noreply@blogger.comtag:blogger.com,1999:blog-4768404585297749711.post-49599452304838314652014-09-23T09:35:33.116-04:002014-09-23T09:35:33.116-04:00Hi Björn, I compiled the Linux kernel first. I use...Hi Björn, I compiled the Linux kernel first. I used version 2.6.28.4 and the config file provided by the gem5 maintainers. Once you have compiled the kernel, you can compile a module for it.Gedarehttps://www.blogger.com/profile/05234390964444125364noreply@blogger.com